| 摘要 |
<p><P>PROBLEM TO BE SOLVED: To provide a bias voltage application circuit in which the bias voltage is applied to a memory cell and a reference cell for a semiconductor storage device, and current difference for the both memory cells can be detected at high speed. <P>SOLUTION: With the same circuit configuration for two bias circuits 20 for supplying current to a selection memory cell and a reference cell separately, each of the bias circuits is equipped with: first active elements 21a, 21b, between a power supply node Vcc and joint nodes Nca, Ncb, by which the current is controlled to suppress voltage level variation of the joint nodes; second active elements 22a, 22b, between the power supply node and the output nodes Nouta, Noutb, by which the current is controlled to alter the voltage level of the output node toward a direction opposite to the voltage level of the joint node of the bias circuit on the other side; third active elements 23a, 23b and fourth active elements 24a, 24b for adjusting the bias voltage between the joint node and current supply nodes Nsa, Nsb and between the output nodes and the current supply nodes. <P>COPYRIGHT: (C)2005,JPO&NCIPI</p> |
