| 摘要 |
<p><P>PROBLEM TO BE SOLVED: To provide a clock interruption detection circuit with a simple circuit configuration capable of minimizing the circuit scale even in a system wherein a plurality of detection object clocks with the same frequency are present. <P>SOLUTION: The clock interruption detection circuit shares a circuit for measuring a HIGH level interval of a detection object clock with a circuit for measuring a LOW level interval of the detection object clock by including: a clock generating circuit 2 for generating a clock signal with a frequency resulting from multiplying the frequency of a reference clock of a circuit whose interruption is to be detected by a multiple of n or a multiple of 1/n in advance and outputting the generated clock signal; a clock selection circuit 1 for switching a path through which a signal denoting the change point of a detection object clock signal is outputted or a path through which the detection object clock signal is outputted as it is and outputting the signal; and a clock detection circuit 3 that receives an output signal from the clock generating circuit as a clock signal, receives the output signal from the clock selection circuit as a reset signal, and outputs an interruption alarm signal when the reset signal is not active for a period while one period of the clock signal is measured. <P>COPYRIGHT: (C)2005,JPO&NCIPI</p> |
