| 摘要 |
The invention provides an image display panel to which a low voltage can be directly applied without largely increasing the number of input terminals. In the image display panel, n pieces of level shifters LSa for boosting n pieces of input signals VIN supplied from the outside are provided. An input of each of the level shifters is connected to one end of one of capacitances via a switching element. The other end of the capacitance C 1 is grounded and the other ends of capacitances C 2 and C 3 are grounded via switching elements. Each of the switching elements operates according to complementary clocks CLK and CLKB of positive and negative phases boosted by a level shifter LS 0 to switch connection of the capacitances from parallel connection to serial connection, thereby boosting the voltage by three times. The boosted voltage is output via an inverter. In such a manner, the image display panel can boost an input signal by two complementary clock signal lines without requiring a number of inversion signals. Since an input signal is not directly connected to the gate of an FET, it is not influenced by variations in thresholds.
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