发明名称 |
Methods of making and using a floating interposer |
摘要 |
A flexible, compliant layer of a single low modulus material for connecting a chip die directly to a circuit card without encapsulation. The flexible compliant layer provides stress relief caused by CTE thermal mismatch in chip die and circuit card. An array of copper plated vias are formed in said compliant layer with each via terminating on opposing surfaces of the layer in copper pads. Rather than copper, other metals, such as gold or nickel, may also be used. An array of holes may be positioned between said array of vias to provide additional resiliency. The plated vias may be angled with respect to said opposing surfaces to allow additional vertical and horizontal stress relief. Connection of the pads on one surface to high melt C-4 solder balls or columns on a chip die results in solder filled vias. Low melt solder connection of the pads on the other surface to a circuit card allows non-destructive rework of the cards.
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申请公布号 |
US6946329(B2) |
申请公布日期 |
2005.09.20 |
申请号 |
US20040832845 |
申请日期 |
2004.04.27 |
申请人 |
INTERNATIONAL BUSINESS MACHINES CORPORATION |
发明人 |
PIERSON MARK VINCENT;SWETERLITSCH JENNIFER REBECCA;WOYCHIK CHARLES GERARD;YOUNGS, JR. THURSTON BRYCE |
分类号 |
H01L23/498;H01R13/24;H05K3/34;H05K3/42;H05K7/10;H05K13/04;(IPC1-7):H01L21/60;H05K1/02 |
主分类号 |
H01L23/498 |
代理机构 |
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代理人 |
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主权项 |
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地址 |
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