发明名称 Waveguide stress engineering and compatible passivation in planar lightwave circuits
摘要 A planar lightwave circuit includes at least one optical waveguide core, and at least one feature proximate the core having a stress-engineered property to balance stress and therefore minimize birefringence affecting the core. A protective passivation layer is formed over the core and the feature to be substantially non-interfering with the balanced stress provided by the feature. The stress balancing feature may be an overcladding layer formed over the core, doped to have a coefficient of thermal expansion approximately matched to that of an underlying substrate, to symmetrically distribute stress in an undercladding between the overcladding and the substrate, away from the core. The protective passivation layer is formed to have a coefficient of thermal expansion approximately matched to that of the overcladding. In one exemplary embodiment, the passivation layer is formed from silicon nitride. Related concepts of stress release grooves, and core overetching, are also disclosed.
申请公布号 US6947653(B2) 申请公布日期 2005.09.20
申请号 US20010977065 申请日期 2001.10.12
申请人 JDS UNIPHASE CORPORATION 发明人 BHARDWAJ JYOTI KIRON;BRAINARD ROBERT JAMES;DONG ZI-WEN;DOUGHERTY DAVID;EGAN ERIK W.;GOPINATHAN NIRANJAN;NAKAMOTO DAVID K.;NGUYEN THOMAS THUAN;THEKDI SANJAY M.;VAIDYANATHAN ANANTHARAMAN;YAMADA HIROAKI;YAN YINGCHAO
分类号 G02B6/12;G02B6/13;G02B6/136;G02B6/34;(IPC1-7):G02B6/10;G02F1/295 主分类号 G02B6/12
代理机构 代理人
主权项
地址