发明名称 Multi-match detection circuit for use with content-addressable memories
摘要 A method and circuit for detecting multiple match conditions in a content addressable memory is disclosed. The circuit detects the multiple matches using a transistor array which is arranged as logical AND and OR gates. A current sensing detector provides multiple match detection when a current path is established through the transistor array when a multiple match exists.
申请公布号 US6947302(B2) 申请公布日期 2005.09.20
申请号 US20040751667 申请日期 2004.01.06
申请人 MICRON TECHNOLOGY INC. 发明人 REGEV ZVI
分类号 G11C15/04;(IPC1-7):G11C15/00 主分类号 G11C15/04
代理机构 代理人
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