NONVOLATILE MEMORY SOLUTION USING SINGLE/POLY P-TYPE FLASH TECHNOLOGY

摘要

PROBLEM TO BE SOLVED: To provide a single/poly 2 transistor (2T) PMOS memory cell which does not require the addition of a surplus mask step. SOLUTION: A single/poly 2T PMOS memory cell 10 comprises a PMOS floating gate (FG) transistor 16 and a PMOS selection gate (SG) transistor 18, which share a drain/source p+ diffusion region 22. Both the FG transistor 16 and the SG transistor 18 are formed in a first n well 12. A control plate of the FG transistor 16 is formed in a second n well. COPYRIGHT: (C)2005,JPO&NCIPI