发明名称 SEMICONDUCTOR DEVICE AND CIRCUIT SIMULATION METHOD
摘要 PROBLEM TO BE SOLVED: To improve circuit simulation accuracy for propagation delay time and consumed power of a semiconductor integrated circuit, by making the accuracy of SPICE parameters improved by grasping accurate DC characteristics of a MOS transistor used in a CMOS logical circuit. SOLUTION: In a present semiconductor device, there are provided a ring oscillator 22 and a monitor 7 on the same wafer (not shown). In the ring oscillator 22, two lines of a plurality of CMOS logical circuits (not shown) are disposed, and CMOS transistors of the one line among these two lines are disposed point-symmetric, with respect to the CMOS transistors of the other line. In the monitor 7, there are provided monitoring CMOS transistors 26a, 26b corresponding to each layout direction of the two lines of the CMOS logical circuits in the ring oscillator 22. Consequently, even the errors caused by different layout directions can be monitored. COPYRIGHT: (C)2005,JPO&NCIPI
申请公布号 JP2005251976(A) 申请公布日期 2005.09.15
申请号 JP20040060337 申请日期 2004.03.04
申请人 MATSUSHITA ELECTRIC IND CO LTD 发明人 SAWARA YASUYUKI
分类号 G06F17/50;H01L21/82;H01L21/822;H01L27/04;(IPC1-7):H01L21/822 主分类号 G06F17/50
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