发明名称 Method for testing semiconductor integrated circuit
摘要 An inventive method is a method for testing a semiconductor integrated circuit that includes a memory circuit provided between a first storage element and a second storage element. The inventive method includes the steps of: (a) initializing the memory circuit; (b) supplying a test pattern to the first storage element; (c) supplying a memory access signal, which corresponds to the test pattern supplied to the first storage element, to the memory circuit through a path that is used in normal operation; (d) capturing a value output from the memory circuit in response to the memory access signal, into the second storage element through a path that is used in normal operation; and (e) comparing the value captured into the second storage element with an expected value.
申请公布号 US2005204239(A1) 申请公布日期 2005.09.15
申请号 US20050038493 申请日期 2005.01.21
申请人 MIYAJI SHINYA;ICHIKAWA OSAMU 发明人 MIYAJI SHINYA;ICHIKAWA OSAMU
分类号 G01R31/28;G06F11/00;G11C29/00;G11C29/10;G11C29/12;(IPC1-7):G01R31/28 主分类号 G01R31/28
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