| 摘要 |
An apparatus for determining the access time and the minimally allowable cycle time of a memory, comprising a clock for generating a signal which stimulates memory data output, programmable delay means for generating a delayed signal, sample-and-hold means for sampling the data output of the memory in response to the delayed signal, a comparator for comparing the sampled data to reference values, and a test status generator, wherein the test status depends on the results of more than one of the comparisons.
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