发明名称 Parallel data link layer controllers in a network switching device
摘要 The present invention features a data link layer processor for performing VLAN tagging operations, policing, shaping, and statistics acquisition integrally with one or more media access controllers (MACs). When a plurality of data link layer processors are operated in parallel in a switching device, the computational burden carried by the route engine is significantly reduced. Moreover, the data link layer processor in its several embodiments may be used to introduce various forms of pre-processing and post-processing into network switching systems that employ route engines that do not posses such functionality.
申请公布号 US2005201415(A1) 申请公布日期 2005.09.15
申请号 US20030751099 申请日期 2003.12.31
申请人 NARSINH ANEES;BAILEY JOHN 发明人 NARSINH ANEES;BAILEY JOHN
分类号 H04L12/56;(IPC1-7):H04J3/22 主分类号 H04L12/56
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