发明名称 Data memory system
摘要 A data memory system includes a non-spare area having a plurality of memory cell blocks and containing pages, a spare area having a plurality of spare memory cell blocks in which data items are previously set to a certain value and containing pages, and a determination circuit which detects a data error of at least two bits when data is read out from the page of the non-spare area and determines the number of error bits in the readout page for each readout page. When the result of determination by the determination circuit indicates two or more bits, the contents of the readout page are error-corrected and programmed into the page of the spare area.
申请公布号 US2005204212(A1) 申请公布日期 2005.09.15
申请号 US20050055782 申请日期 2005.02.11
申请人 NOGUCHI MITSUHIRO;GODA AKIRA 发明人 NOGUCHI MITSUHIRO;GODA AKIRA
分类号 G11C16/06;G11C29/00;G11C29/04;G11C29/42;H01L21/8247;H01L27/115;H01L29/788;H01L29/792;(IPC1-7):G11C29/00 主分类号 G11C16/06
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