发明名称 PULSE WIDTH ADJUSTMENT DEVICE
摘要 <p><P>PROBLEM TO BE SOLVED: To provide a pulse width adjustment device capable of precisely adjusting the pulse width of a clock without being affected by a change in temperature or voltage or the delay quantity of a circuit element. <P>SOLUTION: This device comprises a delay circuit outputting a plurality of delay pulses having a predetermined delay quantity with a clock CLK of a fixed period as input; a plurality of delay state holding circuits outputting holding signals for measuring the delay quantity per period of the clock CLK by use of the plurality of delay pulses; a holding timing circuit generating a pulse showing the timing of outputting the holding signals and giving it to the delay state holding circuits; a plurality of encoders connected to each delay state holding circuit and counting the number of holding signals measured for one period by use of the holding signals given from the connected delay state holding circuit; and an arithmetic value output circuit performing a predetermined operation to the count value of holding signals outputted from each encoder and outputting an arithmetic value corresponding to the delay quantity per period of the clock CLK. <P>COPYRIGHT: (C)2005,JPO&NCIPI</p>
申请公布号 JP2005250893(A) 申请公布日期 2005.09.15
申请号 JP20040061009 申请日期 2004.03.04
申请人 FUJITSU LTD;FUJITSU PERIPHERALS LTD 发明人 FUJIWARA TORU;KASHIWAGI TAKANOBU;UCHIDA AKIYOSHI
分类号 G06F1/06;H03K3/017;H03K5/05;H03K5/13;(IPC1-7):G06F1/06 主分类号 G06F1/06
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