发明名称 Wafer level semiconductor package with build-up layer and method for fabricating the same
摘要 A wafer level semiconductor package with a build-up layer is provided, which includes a glass frame having a through hole for receiving a semiconductor chip therein, a low-modulus buffer material filled within the space formed between the semiconductor chip and the glass frame, a build-up layer formed on the glass frame and the semiconductor chip such that the build-up layer is electrically connected to the semiconductor chip, and a plurality of conductive elements mounted on the build-up layer so that the semiconductor chip is electrically connected to external devices. With the use of the glass frame and low-modulus buffer material, the wafer level semiconductor package thus-obtained is free from warpage, chip-crack, and delamination problems and the reliability thereof is enhanced. A method for fabricating the wafer level semiconductor package is also provided.
申请公布号 US2005202590(A1) 申请公布日期 2005.09.15
申请号 US20040846460 申请日期 2004.05.14
申请人 SILICONWARE PRECISION INDUSTRIES CO., LTD. 发明人 HUANG CHIEN-PING;HSIAO CHENG-HSU;HUANG CHIH-MING
分类号 H01L21/44;(IPC1-7):H01L21/44 主分类号 H01L21/44
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