发明名称 |
Noise cancellation device, engine-noise cancellation device, and noise cancellation method |
摘要 |
A phase-locked loop (PLL) circuit generates a sine wave signal synchronized with an input signal. The sine wave signal is directly supplied to a first multiplier. The sine wave signal is also supplied to a second multiplier after shifting the phase by 90 degrees by an all-pass filter (APF). The first and second multipliers multiply the corresponding input signals by corresponding predetermined gains. An adder sums the products. Sound corresponding to the sum is produced from a speaker to a sound field. A filter-controlling unit controls the gains for the first and second multipliers, respectively, to minimize an error signal "e" for the output level of a microphone installed at a listening position.
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申请公布号 |
US6944303(B2) |
申请公布日期 |
2005.09.13 |
申请号 |
US20030364665 |
申请日期 |
2003.02.11 |
申请人 |
ALPINE ELECTRONICS, INC. |
发明人 |
AKIHO MASAICHI |
分类号 |
B60R11/02;F01N1/00;G10K11/178;H03B29/00;(IPC1-7):A61F11/06;G10K11/16 |
主分类号 |
B60R11/02 |
代理机构 |
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代理人 |
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主权项 |
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地址 |
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