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发明名称
REDUCTION DE GIGUE DANS DES DISPOSITIFS DE CIRCUIT INTEGRE A SIGNAUX MELANGES
摘要
申请公布号
FR2822607(B1)
申请公布日期
2005.09.09
申请号
FR20010014634
申请日期
2001.11.13
申请人
FUJITSU LIMITED
发明人
DEDIC IAN
分类号
H03M1/66;H03K17/00;H03K19/003;H03M1/08;H03M1/74;(IPC1-7):H03M1/08
主分类号
H03M1/66
代理机构
代理人
主权项
地址
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