发明名称 STRAINED SILICON WAFER AND MANUFACTURING METHOD THEREOF
摘要 PROBLEM TO BE SOLVED: To provide a distorted silicon wafer and a manufacturing method thereof which is capable of further reducing the threading dislocation density of a distorted Si layer formed on a SiGe layer in a distorted silicon wafer with the SiGe layer. SOLUTION: A manufacturing method of a distorted silicon wafer comprises the steps of: forming a graded SiGe layer having a Ge composition ratio progressively increased stepwise on a single crystal silicon substrate; forming a SiGe constant composition layer having a Ge composition ratio almost equivalent to the Ge composition ratio on the surface of the graded SiGe layer; and forming a distorted Si layer having a thickness of less than 15 nm and a threading dislocation density of 1×10<SP>3</SP>cm<SP>-2</SP>or less on the graded SiGe layer. COPYRIGHT: (C)2005,JPO&NCIPI
申请公布号 JP2005244187(A) 申请公布日期 2005.09.08
申请号 JP20050009952 申请日期 2005.01.18
申请人 TOSHIBA CERAMICS CO LTD 发明人 SENDA TAKESHI;IGARASHI MASATO;SENSAI KOJI;KURITA HISATSUGU
分类号 C30B29/06;C23C16/24;H01L21/20;H01L21/205;(IPC1-7):H01L21/20 主分类号 C30B29/06
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