发明名称 INTERRUPTION CONTROLLER
摘要 PROBLEM TO BE SOLVED: To preferentially accept interruption from a processing circuit whose processing is delayed to an assumed processing time. SOLUTION: This interruption controller is provided with a processing start requesting part 11 which makes processing circuits 50 to 80 whose processing is requested by a CPU start their processing, an interruption accepting part 13 which accepts the interruption of the processing circuits 50 to 80, counters 141a to 144a which measure a time since the processing circuits 50 to 80 are made to start processing until interruption is accepted by the CPU, a priority calculating part 15 which calculates a difference between the time measured by the counters 141a to 144a and the assumed processing time of the respective processing circuits 50 to 80 as priority and a notifying part 16 which notifies the CPU 30 of the interruption whose priority is the maximum. COPYRIGHT: (C)2005,JPO&NCIPI
申请公布号 JP2005242467(A) 申请公布日期 2005.09.08
申请号 JP20040048224 申请日期 2004.02.24
申请人 KYOCERA MITA CORP 发明人 SUGIHARA HIROSHI
分类号 B41J29/38;G06F9/46;G06F9/48;(IPC1-7):G06F9/46 主分类号 B41J29/38
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