Electrically word-erasable non-volatile memory device, and biasing method thereof

摘要

A memory device formed by an array of memory cells extending in rows and columns. The device is formed by a plurality of N-type wells extending parallel to the rows; each N-type well houses a plurality of P-type wells extending in a direction transverse to the rows. A plurality of main bitlines extend along the columns. Each P-type well is associated to a set of local bitlines that extend along the respective P-type well and are coupled to the drain terminals of the cells accommodated in the respective P-type well. Local-bitlines managing circuits are provided for each P-type well and are located between the main bitlines and a respective set of local bitlines for controllably connecting each local bitline to a respective main bitline.