发明名称 SEMICONDUCTOR DEVICE
摘要 <p><P>PROBLEM TO BE SOLVED: To provide the semiconductor device of a multichip package structure capable of preventing a processing load such as the upper/lower reversal of an address or data from being put on an access main body without aligning mirror surface target chips. <P>SOLUTION: Switching circuits 4A and 18A disposed in a semiconductor memory chip switch the interface function of a predetermined second external connection electrode according to the state of a potential applied to a first external connection electrode by a bonding option. The second external connection electrode of the switching target of the interface function includes an electrode for plural bit parallel inputting/outputting, and an electrode for control signal inputting. For example, the interface function of the predetermined second external connection electrode is switched between validity and invalidity. The second external connection electrode is preferably arranged so that a pair of semiconductor memory chips roughly coincide with each other in front and back side directions in the stacked state of backsides. <P>COPYRIGHT: (C)2005,JPO&NCIPI</p>
申请公布号 JP2005243132(A) 申请公布日期 2005.09.08
申请号 JP20040050819 申请日期 2004.02.26
申请人 RENESAS TECHNOLOGY CORP 发明人 KASAI HIDEO
分类号 G11C16/06;G11C7/00;G11C7/10;G11C11/401;G11C16/02;H01L21/822;H01L25/065;H01L25/07;H01L25/18;H01L27/04;H01L27/10;H01L27/115;(IPC1-7):G11C16/06 主分类号 G11C16/06
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