FLIP-FLOP, SHIFT REGISTER, AND ACTIVE MATRIX TYPE DISPLAY DEVICE

摘要

PROBLEM TO BE SOLVED: To improve both of rising characteristics and falling characteristics of an output signal in a flip-flop, and to reduce the signal delay of a shift register constituted by this flip-flop.

SOLUTION: A latch unit 22 has a latch circuit for latching a signal inputted from a gating unit 21 configured by an inverter 24 and an inverter 25, and an analog switch ASW2 for switching an on/off state, in response to a High/Low state of a reset signal R is disposed between the inverter 24 of the latch circuit and an output terminal OUT. A switching element Mn6 for switching the on/off state, according to the High/Low state of the reset signal between an input of a low potential VSS of an operating power source of the flip-flop and the output terminal OUT.

COPYRIGHT: (C)2005,JPO&NCIPI