发明名称 FIELD EFFECT TRANSISTOR AND ITS MANUFACTURING METHOD
摘要 PROBLEM TO BE SOLVED: To provide a gate-recessed Ga-containing group III-V compound semiconductor field effect transistor which is immune to the surface and the interface and superior in performance, by removing damage at forming of a gate recess without increasing the manufacturing process steps. SOLUTION: A contact layer with a source electrode S and a drain electrode D formed as Ohmic electrodes uses not an n<SP>+</SP>GaN but an n-type semiconductor layer such as ZnO or In<SB>2</SB>O<SB>3</SB>conductive metal oxide layer 5 easy to etch. Thus, a recess structure is manufacturable without introducing damage in the surface of an AlGaN 4 for laminating a gate metal G thereon. COPYRIGHT: (C)2005,JPO&NCIPI
申请公布号 JP2005243719(A) 申请公布日期 2005.09.08
申请号 JP20040048275 申请日期 2004.02.24
申请人 ONO YASUO;KYOCERA CORP 发明人 ONO YASUO;NISHIZONO KAZUHIRO
分类号 H01L29/812;H01L21/338;H01L29/778;(IPC1-7):H01L21/338 主分类号 H01L29/812
代理机构 代理人
主权项
地址
您可能感兴趣的专利