Multilevel semiconductor memory device and method for driving the same as a neuron element in a neural network computer

摘要

A semiconductor device includes: a control-voltage supply unit 110 ; an MOS transistor including a gate electrode 109 and drain and source regions 103 a and 103 b; a dielectric capacitor 104 ; and a resistor 106 . The dielectric capacitor 104 and the resistor 106 are disposed in parallel and interposed between the gate electrode 109 and the control-voltage supply unit 110 . With this structure, a charge is accumulated in each of an intermediate electrode of the dielectric capacitor 104 and the gate electrode 109 upon the application of a voltage, thereby varying a threshold value of the MOS transistor. In this manner, the history of input signals can be stored as a variation in a drain current in the MOS transistor, thus allowing multilevel information to be held.