发明名称 Method and apparatus for modulating and demodulating digital data
摘要 A succession of input data words is converted into a first succession of information code words including first candidate one and a second succession of information code words including second candidate one different from first candidate one. One is selected from the first succession of information code words and the second succession of information code words as a final succession of information code words in a manner such that the absolute value of a DSV relating to the final information-code-word succession will be smaller. Check bits are generated in response to the final information-code-word succession and a predetermined parity generation matrix of LDPC encoding. The check bits are changed to conversion code words. The final information-code-word succession and the conversion code words are combined into an output-code-word sequence which obeys (1, k) RLL, where "k" is a predetermined natural number in the range of 9 to 12.
申请公布号 US6940431(B2) 申请公布日期 2005.09.06
申请号 US20040885320 申请日期 2004.07.07
申请人 VICTOR COMPANY OF JAPAN, LTD. 发明人 HAYAMI ATSUSHI
分类号 G11B20/14;H03M5/14;H03M7/14;H03M13/11;H03M13/19;H03M13/31;H04L25/49;(IPC1-7):H03M7/20 主分类号 G11B20/14
代理机构 代理人
主权项
地址