发明名称 System and method for generating 128-bit cyclic redundancy check values with 32-bit granularity
摘要 A System and Method for generating Cyclic Redundancy Check (CRC) values in a system adapted simultaneously handling a plurality of blocks in parallel is described. Included is a memory or other storage device for storing data blocks, wherein the memory or storage device is adapted to output a plurality of data blocks in parallel. A data bus provides a data path wide enough to accommodate the parallel data blocks and is further coupled to a plurality of CRC cores coupled to the data bus, wherein CRC values are calculated for every combination of data blocks on the data bus. A multiplexer coupled to the CRC cores selects the output of one of the CRC cores based on the number of valid data blocks on the data bus. Once the correct CRC value has been calculated, it is appended to a data segment, comprised of a group of data blocks, for transmission to another device.
申请公布号 US2005193316(A1) 申请公布日期 2005.09.01
申请号 US20040783345 申请日期 2004.02.20
申请人 IREADY CORPORATION 发明人 CHEN ADDISON
分类号 G06K5/04;G11B5/00;G11B20/20;H03M13/00;H03M13/09;(IPC1-7):G11B5/00 主分类号 G06K5/04
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