发明名称 Circuit arrangement having a load transistor and a voltage limiting circuit and method for driving a load transistor
摘要 The invention relates to a circuit arrangement having connecting terminals (K 1 , K 2 ) for application of a supply voltage (V+) and having a load transistor (M) for connecting a load (Z) to the supply voltage, said load transistor having a control terminal (G) and a first and second load terminal (D, S), the control terminal (G) of the load transistor ( 2 ) being coupled to a drive terminal (IN) for application of a drive signal (Sin). A voltage limiting circuit ( 10 ) is connected between one (D) of the load terminals and the drive terminal (G) of the transistor, a deactivation circuit ( 20 ) being provided, which is designed to deactivate the voltage limiting circuit ( 10 ) in a manner dependent on the supply voltage (V+).
申请公布号 US2005189965(A1) 申请公布日期 2005.09.01
申请号 US20050057098 申请日期 2005.02.11
申请人 INFINEON TECHNOLOGIES AG 发明人 TIHANYI JENOE
分类号 H03K17/082;H03K17/30;H03K17/695;(IPC1-7):H03B1/00 主分类号 H03K17/082
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