发明名称 Processor execution unit for complex operations
摘要 Methods and systems for executing SIMD instructions that efficiently implement new SIMD instructions and conventional existing SIMD MAC-type instructions, while avoiding replication of functions in order to keep the size of the logic circuit size to as low a level as can reasonably be achieved. An instruction unit executes Single Instruction Multiple Data instructions, including instructions acting on operands representing complex numbers. The instruction unit includes functional blocks that are commonly utilized to execute a plurality of the instructions, wherein the plurality of instructions utilize various individual functional blocks in various combinations with one another. The plurality of instructions is optionally executed in a pipeline fashion.
申请公布号 US2005193185(A1) 申请公布日期 2005.09.01
申请号 US20040956091 申请日期 2004.10.04
申请人 BROADCOM CORPORATION 发明人 TAUNTON MARK;DAWSON ANDREW J.
分类号 G06F15/00;(IPC1-7):G06F15/00 主分类号 G06F15/00
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