发明名称 |
Power glitch free internal voltage generation circuit |
摘要 |
A power glitch free internal voltage generation circuit includes: a voltage divider for dividing level of an internal voltage; a reference voltage generator generating a reference voltage having a predetermined voltage level by dividing a level of an external voltage; a comparator connected to the external voltage and the internal voltage and comparing the divided internal voltage with the reference voltage to generate a compared output; and a driver for supplying the external voltage to the internal voltage in response to the output of the comparator. In this manner, a high voltage level from either of the external voltage and the internal voltage is used as a source of the comparator. This, in turn, stably maintains the internal voltage because the driver for transferring the external voltage to the internal voltage is intercepted in the case where a glitch occurs that lowers the external voltage to a level lower than the internal voltage.
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申请公布号 |
US6936998(B2) |
申请公布日期 |
2005.08.30 |
申请号 |
US20030620547 |
申请日期 |
2003.07.16 |
申请人 |
SAMSUNG ELECTRONICS CO., LTD. |
发明人 |
CHO SUNG-HEE |
分类号 |
G05F1/56;G05F3/24;(IPC1-7):G05F1/40;G05F1/10 |
主分类号 |
G05F1/56 |
代理机构 |
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代理人 |
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