High voltage interface module

摘要

The present invention provides a voltage conditioning interface module to condition an electrical signal locally. This module receives the unsafe electrical signal at an input port. This input port is electrically coupled to an external sampling point on an electrical circuit or system under test. A conditioning circuit having both a voltage reducing circuit and a voltage limiting circuit provides a reduced voltage. The voltage limiting circuit is in parallel with the output terminals that output the reduced voltage. This arrangement ensures that when a circuit element within the voltage reducing circuit fails, an unsafe condition does not exist across these terminals.