发明名称 Semiconductor package structure reducing warpage and manufacturing method thereof
摘要 An electrical substrate useful for semiconductor packages is disclosed. The electrical substrate includes a core insulative layer. A first surface of the insulative layer has circuit patterns thereon. Some of the circuit patterns are stepped in their heights from the first surface, in that a first subportion of the circuit pattern, including a ball land, extends further from the first surface than a second subportion of the same circuit pattern, and also extends further from the first surface than a ball land of other circuit patterns. Accordingly, solder balls fused to the ball lands of the stepped circuit patterns extend further from the first surface than same-size solder balls fused to the ball lands of the non-stepped circuit patterns, thereby circumventing electrical connectivity problems that may arise from warpage of the electrical substrate.
申请公布号 US6936922(B1) 申请公布日期 2005.08.30
申请号 US20030672886 申请日期 2003.09.26
申请人 AMKOR TECHNOLOGY, INC. 发明人 PARK SUNG SOON;JANG SANG JAE;LEE CHOON HEUNG;LEE SEON GOO;SOHN EUN SOOK;PARK SUNG SU
分类号 H01L23/16;H01L23/48;H01L23/498;H01L25/10;H05K1/11;H05K3/34;(IPC1-7):H01L23/48 主分类号 H01L23/16
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