发明名称 SEMICONDUCTOR MEMORY
摘要 A direct sense amplifier isolates an MOS transistor serving as a differential pair having a gate being connected with a bit line from an RLIO line by inserting an MOS transistor being controlled by a column select line arranged in the direction of the bit line between them and connects the source of the MOS transistor serving as a differential pair with a common source line arranged in the direction of the word line. Power consumption is reduced greatly at the time of read operation by activating the direct sense amplifier only at a select mat through the column select line and the common source line. Higher-rate reading operation is realized by isolating the parasitic capacitance of the MOS transistor serving as a differential pair from a local IO line thereby reducing the load capacity of the local IO line, and test after fabrication is facilitated by reducing the data pattern dependency of the load capacity of the local IO line during the reading operation.
申请公布号 KR20050084934(A) 申请公布日期 2005.08.29
申请号 KR20057007903 申请日期 2005.05.04
申请人 KABUSHIKI KAISHA HITACHI SEISAKUSHO(D/B/A HITACHI, LTD.);ELPIDA MEMORY, INC.;HITACHI ULSI SYSTEMS CO., LTD. 发明人 SEKIGUCHI TOMONORI;MIYATAKE SHINICHI;SAKATA TAKESHI;TAKEMURA RIICHIRO;NODA HIROMASA;KAJIGAYA KAZUHIKO
分类号 G11C7/06;G11C11/407;G11C11/409;H01L27/108;(IPC1-7):G11C7/06 主分类号 G11C7/06
代理机构 代理人
主权项
地址