| 摘要 |
A data processing system (102) includes an associative memory device (104) containing n-cells, each of the n- cells includes a processing circuit (130). A controller (100) is utilized for issuing one of a plurality of instructions to the associative memory device (104), while a clock device (106) is utilized for outputting a synchronizing clock signal comprised of a predetermined number of clock cycles per second. The clock device (106) outputs the synchronizing clock signal to the associative memory device (104) and the controller which globally communicates one of the plurality of instructions to all of the n-cells simultaneously, within one of the clock cycles.
|
