发明名称 SEMICONDUCTOR CIRCUIT DEVICE SIMULATION METHOD AND SEMICONDUCTOR CIRCUIT DEVICE SIMULATOR
摘要 A simulator for accurately simulating the degree of degradation and the degree of recovery of a characteristic of a transistor so as to design a semiconductor device with high reliability. A method for the simulation is also disclosed. If a negative gate voltage (negative bias voltage) Vg is applied to the gate of a transistor, the characteristics of the transistor will degrade. When the application of the negative gate voltage Vg is ceased (namely, when a bias-free voltage is applied), the degraded characteristics of the transistor will recover. Taking a log of the application time t of the gate voltage, log(t), and using constants CD, BD dependent on the negative bias voltage, the degree of degradation Delta PD(t)=CD+BD.log(t) is calculated. Using constants CR, BR dependent on the bias-free voltage, the degree of recovery DeltaPR(t)=CR+BR.log(t) is calculated. The degree of degradation (DeltaPD), the degree of recovery (DeltaPR), and the fundamental degradation (XD) are summed. Preferably, by dividing the passage time into time divisions and using a degradation function and a recovery function different every time division, the degree of degradation and the degree of recovery for each time division are determined.
申请公布号 KR20050083556(A) 申请公布日期 2005.08.26
申请号 KR20047012901 申请日期 2004.08.19
申请人 SONY CORPORATION 发明人 USUI HIROKI
分类号 G06F17/50;H01L21/00;H01L21/02;H01L21/336;H01L21/82;H01L21/8234;H01L27/088;H01L29/00;H01L29/78;(IPC1-7):H01L21/02;G06F19/00 主分类号 G06F17/50
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