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发明名称
METHOD AND APPARATUS FOR REDUCING BACK-TO-BACK VOLTAGE GLITCH ON HIGH SPEED DATA BUS
摘要
申请公布号
KR100510758(B1)
申请公布日期
2005.08.26
申请号
KR20027013041
申请日期
2002.09.30
申请人
发明人
分类号
G06F13/40;(IPC1-7):G06F13/40
主分类号
G06F13/40
代理机构
代理人
主权项
地址
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