发明名称 Adder
摘要 An adder that can detect the generation of overflow at a high speed. Carry signal c 14 from the 15<SUP>th </SUP>digit to the 16<SUP>th </SUP>digit in the result of addition from the 1<SUP>st </SUP>digit to the 16<SUP>th </SUP>digit of the input data is generated on the basis of bit signals (a 0 -a 15 , b 0 -b 15 ) for the portion from the 1<SUP>st </SUP>digit to the 15<SUP>th </SUP>digit of the input data, and of carry signal CIN input to the 1<SUP>st </SUP>digit, and it is output from CLA 204 . Then, carry signal c 15 from the 16<SUP>th </SUP>digit to the 17<SUP>th </SUP>digit is generated based on said generated carry signal c 14 and bit signals (a 15 , b 15 ) of the 16<SUP>th </SUP>digit of the input data, and this is output from CIA 205 . Exclusive-NOR circuit 206 then operates on said carry signals c 14 and c 15 , and overflow detection signal OVF 16 is generated.
申请公布号 US2005188000(A1) 申请公布日期 2005.08.25
申请号 US20050038563 申请日期 2005.01.18
申请人 TAKEGAMA AKIHIRO;TANAKA TSUYOSHI;FUSUMADA MASAHIRO 发明人 TAKEGAMA AKIHIRO;TANAKA TSUYOSHI;FUSUMADA MASAHIRO
分类号 G06F7/38;G06F7/50;G06F7/506;G06F7/508;(IPC1-7):G06F7/50 主分类号 G06F7/38
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