CIRCUIT ARRANGEMENT AND METHOD FOR PROTECTING AN INTEGRATED SEMICONDUCTOR CIRCUIT

摘要

The invention relates to a circuit arrangement and to a method for protecting an integrated semiconductor circuit that comprises a protective circuit having a thyristor structure (SCR) and a control circuit (TC; C1, R1, I1 to I3) for controlling the protective circuit, which both are inserted between an element (PV, LV) to be protected and a reference potential (VB). The control circuit (TC; C1, R1, I1 to I3) generates a plurality of control signals that control one active element (T1, T2) of the thyristor structure each. The invention allows to specifically trigger the control circuit at defined switching thresholds and short gate-controlled rise times. The invention also relates to a method for determining the duration of activation of the control circuit.