PROGRAM CONVERSION DEVICE AND PROGRAM CONVERSION METHOD
摘要
<p>A compiler improving the processing speed during program execution without issuing an instruction which may cause interlock is a compiler for a processor having an instruction which may cause interlock during execution. The compiler causes a computer to function: as a loop structure conversion unit (186) for causing an input program to divide the loop of x count into a loop of y count and performing dual loop conversion with the loop of y count as an inner loop and the loop of x/y count as an outer loop; and as an instruction optimal arrangement unit (187) for arranging an instruction which may cause interlock in the program after the dual loop conversion.</p>
申请公布号
WO2005078579(A1)
申请公布日期
2005.08.25
申请号
WO2005JP01670
申请日期
2005.02.04
申请人
MATSUSHITA ELECTRIC INDUSTRIAL CO., LTD.;KAWABATA, TERUO;OGAWA, HAJIME;HEISHI, TAKETO;YAMAMOTO, YASUHIRO;MICHIMOTO, SHOHEI