发明名称 SEMICONDUCTOR MEMORY DEVICE AND ITS THRESHOLD VOLTAGE CONTROL METHOD
摘要 <p><P>PROBLEM TO BE SOLVED: To provide a semiconductor memory device capable of relieving over-erased cells in a short period of time and improving this relieving rate, and a threshold voltage control method. <P>SOLUTION: This memory device has a memory cell array equipped with memory cells having floating gates, a 1st control to shift the threshold voltages of the above memory cells within a predetermined extent whose upper limit is the 1st level, a 2nd control to shift the lower limits of the above shifted threshold voltages toward a second level, a control circuit for the 3rd control to shift the lower limits of the threshold voltages shifted in the above 2nd control to a 3rd level which is closer to the 1st level than the 2nd level, and a measuring circuit to measure the time required for the 2nd control. The above control circuit repeats the 2nd control, and when the above threshold voltages exceed the 2nd level or the measured time by the above measuring circuit exceeds the above predetermined time range, this memory device finishes the 2nd control and starts the 3rd control. <P>COPYRIGHT: (C)2005,JPO&NCIPI</p>
申请公布号 JP2005228371(A) 申请公布日期 2005.08.25
申请号 JP20040033491 申请日期 2004.02.10
申请人 TOSHIBA CORP 发明人 SHINBA YOSHIAKI;FUJIMOTO TAKUYA
分类号 G11C16/02;G11C11/34;G11C16/06;G11C16/34;(IPC1-7):G11C16/02 主分类号 G11C16/02
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