发明名称 Method for fabricating memory device
摘要 The present invention relates to a method for fabricating a memory device. According to this invention, because the trenches for the isolation structures are etched simultaneously as patterning the first conductive layer and the first dielectric layer, the formed isolation structures are self-aligned with the stacked gate structures, thus increasing the reliability for the memory device by avoiding misalignment problems.
申请公布号 US2005186735(A1) 申请公布日期 2005.08.25
申请号 US20040788194 申请日期 2004.02.25
申请人 LEE TZYH-CHEANG 发明人 LEE TZYH-CHEANG
分类号 H01L21/28;H01L21/336;H01L21/762;H01L21/8238;H01L27/115;(IPC1-7):H01L21/823 主分类号 H01L21/28
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