| 摘要 |
PROBLEM TO BE SOLVED: To output the data signals of differential pairs in a data signal input part which are selected by clock signals in a state where a waveform is excellent. SOLUTION: A clock signal input part 52 is connected to the data signal input part 51 which is connected to a bias current source 50. The data signals D1, -D1 are inputted to transistors M1, M2 which constitute the differential pair 10 of the data signal input part 51. The data signals D2, -D2 are inputted to transistors M3, M4 constituting the differential pair 11. The clock signal input part 52 comprises: differential pairs 12, 13 connected to the differential pair 10; and differential pairs 14, 15 connected to the differential pair 11. The clock signal CLK is inputted to the transistors M5, M7, M10, M12 among the transistors M5-M12 which constitute the differential pairs 12-15. The clock signal -CLK is inputted to the transistors M6, M8, M9, and M11. COPYRIGHT: (C)2005,JPO&NCIPI
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