发明名称 |
TESTING AND REPAIR METHODOLOGY FOR MEMORIES HAVING REDUNDANCY |
摘要 |
A method of testing and repairing an integrated circuit having a total number of fuses for effecting repair of the integrated circuit. The method including: testing a memory array with a set of tests and reserving a first number of the total number of fuses for use in repairing the memory array based on results of the first set of tests; and shmoo testing the memory array by incrementing, decrementing or incrementing and decrementing values of a test parameter until a minimum or maximum value of the test parameter is reached that utilizes a second number of the total number of fuses for use in repairing the memory array to operate at the minimum or maximum value of the test parameter.
|
申请公布号 |
US2005188287(A1) |
申请公布日期 |
2005.08.25 |
申请号 |
US20040708342 |
申请日期 |
2004.02.25 |
申请人 |
INTERNATIONAL BUSINESS MACHINES CORPORATION |
发明人 |
COMBS MICHAEL L.;GROSCH DALE B.;SAITOH TOSHIHARU;VANZO GUY M. |
分类号 |
G01R31/317;G11C29/00;G11C29/24;(IPC1-7):G11C29/00 |
主分类号 |
G01R31/317 |
代理机构 |
|
代理人 |
|
主权项 |
|
地址 |
|