发明名称 CENTRAL PROCESSING UNIT AND PROCESSOR CONTROL METHOD
摘要 PROBLEM TO BE SOLVED: To prevent an instruction code following an interrupted instruction from being executed in accordance with the end of interruption processing. SOLUTION: When a start request signal of interruption processing is generated while the operation of a processor 2 is stopped, the operation of the processor 2 is temporarily restarted to execute the interruption processing. When the interruption processing is ended, a register read signal is outputted to a DMA controller 6 to stop the operation of the processor 2 again. Accordingly, an instruction code following an access request to a RAM 5 can be prevented from being executed in accordance with the end of interruption processing in spite of execution of DMA processing. COPYRIGHT: (C)2005,JPO&NCIPI
申请公布号 JP2005228103(A) 申请公布日期 2005.08.25
申请号 JP20040036747 申请日期 2004.02.13
申请人 SEIKO EPSON CORP 发明人 HOSHINA SHOJI;TODOROKI MITSUNARI;ISOMURA MASAICHI
分类号 G06F13/28;G06F9/46;G06F9/48;(IPC1-7):G06F9/46 主分类号 G06F13/28
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