INTEGRATED CIRCUIT ARRANGEMENT WITH ESD-RESISTANT CAPACITOR AND CORRESPONDING METHOD OF PRODUCTION

摘要

The invention relates to a circuit arrangement (10) that comprises a capacitor (12) inside an n-trough (20). A specific polarization of the capacitor (12) makes sure that a depletion zone is formed in the trough (20) and the capacitor (12) has a high ESD resistance. An optionally present auxiliary doped layer (26) ensures a high area capacitance of the capacitor despite high ESD resistance.