发明名称 |
Selective solder bump application |
摘要 |
Selective application of solder bumps in an integrated circuit package. Solder bumps are selectively applied in a solder bump integrated circuit packaging process so that portions of a circuit can be effectively disabled. The bumps may be selectively applied either to a die or to the substrate using multiple solder masks, one for each pattern of solder bumps desired or can be otherwise applied in multiple patterns depending upon which portions of the circuitry are to be active and which are to be disabled.
|
申请公布号 |
US6933611(B2) |
申请公布日期 |
2005.08.23 |
申请号 |
US20030629055 |
申请日期 |
2003.07.29 |
申请人 |
HEWLETT-PACKARD DEVELOPMENT COMPANY, L.P. |
发明人 |
KEVER WAYNE |
分类号 |
H01L21/48;H01L21/66;(IPC1-7):H01L23/48;H01L23/52;H01L29/40;H01L21/44 |
主分类号 |
H01L21/48 |
代理机构 |
|
代理人 |
|
主权项 |
|
地址 |
|