发明名称 |
Voltage regulator with improved load regulation using adaptive biasing |
摘要 |
A low drop out voltage regulator ( 10 ) that receives an input voltage and generates a substantially constant output voltage includes a gain stage ( 12 ), a buffer stage ( 14 ), an output driver transistor ( 16 ), and first and second load current sense circuits ( 18, 20 ). The first load current sense circuit is connected between the output driver transistor and the buffer stage and adaptively increases a bias current of the buffer stage as a function of the load current. The second load current sense circuit is connected between the output driver transistor and the gain stage and adaptively decreases a bias current of the gain stage as the load current increases.
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申请公布号 |
US6933772(B1) |
申请公布日期 |
2005.08.23 |
申请号 |
US20040770149 |
申请日期 |
2004.02.02 |
申请人 |
FREESCALE SEMICONDUCTOR, INC. |
发明人 |
BANERJEE JAIDEEP;NANDURKAR TUSHAR S |
分类号 |
G05F1/10;G05F1/565;G05F3/02;(IPC1-7):G05F1/10 |
主分类号 |
G05F1/10 |
代理机构 |
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代理人 |
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主权项 |
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地址 |
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