发明名称 Arrangement for controlling learning of layer 3 network addresses in a network switch
摘要 A network switch, configured for performing layer 2 and layer 3 switching in an Ethernet (IEEE 802.3) network without blocking of incoming data packets, includes a switching module for performing layer 2 and layer 3 switching operations, and a plurality of network switch ports, each configured for connecting the network switch to a corresponding subnetwork. One of the switch ports serves as a router interface port for transferring data packets between the network switch and a router. The network switch, configured for performing learning of layer 2 addresses and layer 3 addresses of the data packets, has a learning bit for each network switch port. A host network controller disables the learning bit for the router interface port in compliance with IEEE 802.1d, preventing the switching module from performing any learning of layer 2 or layer 3 addresses for the data packets transferred between the network switch and the router on the router interface port. Hence, the network switch can perform layer 3 switching operations for connected subnetworks, enabling the router to be bypassed; moreover, the disabling of the learning bit for the router interface port ensures that the router traffic does not over overwhelm the layer 2 and layer 3 address table within the network switch.
申请公布号 US6934260(B1) 申请公布日期 2005.08.23
申请号 US20000496016 申请日期 2000.02.01
申请人 ADVANCED MICRO DEVICES, INC. 发明人 KANURI MRUDULA
分类号 H04L12/28;H04L12/56;H04L29/12;(IPC1-7):H04L12/28 主分类号 H04L12/28
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