发明名称 Semiconductor memory with gate at least partially located in recess defined in vertically oriented semiconductor layer
摘要 A semiconductor memory comprises: a first conductivity type semiconductor substrate and one or more memory cells each constituted of an island-like semiconductor layer having a recess on a sidewall thereof, a charge storage layer formed to entirely or partially encircle a sidewall of the island-like semiconductor layer, and a control gate formed on the charge storage layer, wherein at least one charge storage layer of said one or more memory cells is partially situated within the recess formed on the sidewall of the island-like semiconductor layer.
申请公布号 US6933556(B2) 申请公布日期 2005.08.23
申请号 US20020174903 申请日期 2002.06.20
申请人 SHARP KABUSHIKI KAISHA 发明人 ENDOH TETSUO;MASUOKA FUJIO;TANIGAMI TAKUJI;YOKOYAMA TAKASHI;TAKEUCHI NOBORU
分类号 H01L21/8247;H01L27/115;H01L29/788;H01L29/792;(IPC1-7):H01L29/788 主分类号 H01L21/8247
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