发明名称 Method and apparatus for designing a pattern on a semiconductor surface
摘要 A method of forming a pattern of elements is shown. In one embodiment, the method is used to create a reticle. In another embodiment, the method is used to further form a number of elements on a surface of a semiconductor wafer. Identified problem structures or regions in a pattern of elements are moved from lower level cells of a hierarchy structure into higher level cells before edge movement takes place. Because all cells have been selectively leveled first, substantially all external influences to cells have been removed for each cell before edge movement takes place. The methods and procedures described herein therefore reduce the possibility of undesirable modifications such as electrical shorts. The methods and procedures described herein also reduce overall processing time.
申请公布号 US6934928(B2) 申请公布日期 2005.08.23
申请号 US20020229330 申请日期 2002.08.27
申请人 MICRON TECHNOLOGY, INC. 发明人 JUENGLING WERNER
分类号 G06F17/50;(IPC1-7):G06F17/50 主分类号 G06F17/50
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