ALIGNER AND SEMICONDUCTOR DEVICE MANUFACTURING METHOD USING THE ALIGNER

摘要

A circuit pattern having a size finer than a half of a wavelength of an exposure beam is transferred on a semiconductor wafer plane with an excellent accuracy by means of a mask whereupon an integrated circuit pattern is formed and a reduction projection aligner. The accuracy of transferring the circuit pattern on the semiconductor wafer is improved by synergic effects of super-resolution exposure, wherein a mask cover made of a transparent medium is provided on a pattern side of the integrated circuit mask so as to suppress the aberration of reduction projection alignment, and a method of increasing the number of actual apertures of the optical reduction projection lens system provided with the wafer cover made of the transparent medium on a photoresist side of the semiconductor wafer to which planarizing process is performed.