发明名称 |
PLL CIRCUIT, AND OPTICAL DISK REPRODUCING APPARATUS HAVING PLL CIRCUIT |
摘要 |
PROBLEM TO BE SOLVED: To provide a PLL circuit capable of shortening a period of time required for synchronizing an analog data signal with a clock signal, and to provide an optical disk reproducing apparatus having the PLL circuit. SOLUTION: In the PLL circuit for converting the analog data signal into a digital data signal synchronously with the generated clock signal and generating the clock signal based on this digital data signal, a digital waveform equalization processing is applied to the digital data signal only during the analog data signal is synchronized with the clock signal. COPYRIGHT: (C)2005,JPO&NCIPI
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申请公布号 |
JP2005222649(A) |
申请公布日期 |
2005.08.18 |
申请号 |
JP20040030714 |
申请日期 |
2004.02.06 |
申请人 |
SONY CORP |
发明人 |
FUJIMOTO YUKO;KUSANO TAIZO |
分类号 |
G11B20/14;G11B20/10;(IPC1-7):G11B20/14 |
主分类号 |
G11B20/14 |
代理机构 |
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代理人 |
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主权项 |
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